A Primer On Programmable Logic For FPGA, CPLD and SOC

This article provides a primer on programmable logic to explain the technology, terms and functionality.

The original programmable logic devices were commercially available to the general market in the early 1980’s.  These started out as very useful components which provided designers a cost effective method to integrate discrete logic functions into a single chip, as well as to make board level design changes through programming.

What began as a limited functionality component has exploded to a $20 Billion industry today.

Related Article – Top FPGA Companies For 2013

Overview:

Starting with a short overview on the technology:

The FPGA (Field Programmable Gate Array) descriptor comes from the ability to change the functionality of the device outside of the factory or fabrication facility. This is referred to as in the “field”, which can be a developers desk top, an equipment vendors assembly line or at the customer installation site. “Gate” refers to the control element of the transistor – a CMOS transistor is a three terminal device with a “source”, “drain”, and “gate”. The “Array” is rows and columns of programmable logic elements that comprise the IC.

The process of erasing and loading the FPGA with the code to implement a specific design is called programming or configuring / configuration. This configuration process is similar to a processor loading its instructions and data. Each FPGA manufacturer has a proprietary method,  based on the physical architecture of the device and their design tools, to create a digital bit-stream which is used to configure the FPGA.

FPGA devices are usually SRAM (Static Random Access Memory) based, which means that the “array”, or core logic function, must be programmed, or downloaded, into the device each time the power is reset. Configuration retention can be enabled by using an external battery back-up to continuously power the FPGA even when the system power is removed.

In contrast to SRAM based devices, it is also possible to use an “anti-fuse” technology for storing the configuration information. These devices are also referred to as “One Time Programmable (OTP)” since the configuration process physically alters the semiconductor by breaking a connection (e.g., the fuse). Once configured, an anti-fuse devices retains its programming even when power is removed.

Another type of programmable logic which has a different memory structure is the CPLD (Complex Programmable Logic Device). CPLD are most suited to instant-on, non-volatile, low-cost, low-power, low-density applications. The instant-on and non-volatile characteristics result from the device retaining its configuration information when all power is removed. This is similar to the anti-fuse, with the advantage that most CPLD can be reprogrammed.

The non-volatile devices use an electrically erasable (“EE”) or FLASH memory structure to store the configuration information. This technology is generally more expense to produce and requires a larger overall silicon area than SRAM, which is why it isn’t generally used for the FPGA devices. For comparison, a CPLD generally has a maximum number of logic gates up to the 10 thousand range. An FPGA can have up to 10 million.

The original devices were called “PAL” (Programmable Array Logic) and “GAL” (Generic Array Logic). The PAL  devices had, in comparison to current products, a very simplistic and limited array of transistor cells. These were arranged in a programmable-AND plane whose outputs drove fixed-OR elements. This configuration was used to implement “sum-of-products” binary logic and Boolean equations. The PAL devices were OTP.

Improving on the  PAL, the GAL devices had a larger number of logic elements and were erasable and re-programmable. A single GAL device could take the place of one or more PAL devices, and implement more complex logic functions.

Depending on the vendor and family, the FPGA may have one or more embedded processor blocks as part of the silicon. While it is possible to implement a processor, or microcontroller, as part of the programmable array this can be expensive in terms of resource utilization. Also, as a “soft-core”, this implementation will also run slower and consume more power that a dedicate hardware based processor. An FPGA with one or more embedded silicon processor is sometimes also called a “SoC (System on Chip)”.

Regarding the overall functionality of a what an FPGA can be used for, this is basically limited to a designers imagination and the physical resources available. Programmable logic can be found in nearly every industry segment. High performance devices are used in computing, image processing, avionics controls, game consoles, medical, data centers and communications. Ultra low power devices can be found in portable medical monitors, smart phones, digital cameras, eReaders, hand-held devices and compact embedded systems. The space between low power and high performance includes applications for most consumer devices, white-goods, set-top-boxes, video recorders, audio systems, industrial controls, factory automation, smart networks, wired and wireless networks, automotive systems and nearly everything else that is imagined.

Reference Material:

To learn more about this technology, and how to write programmable logic code in VHDL / Verilog, we suggest the following books available through Amazon:

The Zynq Book: Embedded Processing with the Arm Cortex-A9 on the Xilinx Zynq-7000 All Programmable Soc ($35.00 – paperback)

Designing with Xilinx® FPGAs: Using Vivado ($119.00 – hardcover)

VHDL for Engineers ($167.83 – hardcover)

Vhdl By Example ($19.95 – paperback)

100 Power Tips For FPGA Designers ($49.95 – paperback)

FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version ($100.47 – paperback)

Design Recipes for FPGAs: Using Verilog and VHDL ($36.34 – paperback)

Verilog by Example: A Concise Introduction for FPGA Design ($18.95 – paperback)

Programming FPGAs: Getting Started with Verilog ($18.92 – paperback)

Glossary:

A concise list of the terminology used is provided below, in alphabetical order:

3PLD – 3D Programmable Logic Device – Tabula term for their high-end devices

Antifuse – A device in which connections are permanently programmed by burning out a fuse or silicon element

Configuration – The process of loading design specific bitstream into a device to define the functional operation device

CPLD – Complex Programmable Logic Device

EPROM – Erasable Programmable Read Only Memory (memory content is erased by exposing the chip to ultra-violet light)

EEPROM – Electrically Erasable Programmable Read Only Memory

EPLD -Electrically Programmable Logic Device – Used by Atmel to describe their family of devices

FPGA – Field Programmable Gate Array

FPSLIC – Field Programmable System Level Integrated Circuits – Atmel term for higher SOC type device

GAL – Generic Array Logic

LUT – Look Up Table – Used to  implement any arbitrarily defined Boolean function; including a flip-flop element creates a memory cell

OTP – One Time Programmable

PAL –  Programmable Array Logic

PEEL  – Programmable Electrically Erasable Logic

SPLD – Simple Programmable Logic Device – Atmel term for low functionality CPLD

SoC – System On Chip

For a complete list of terms, please refer to the Altera Definitions or Xilinx Glossary .

(Photo Credit -iShutter)

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