Low Power Design For Embedded Systems
Low power design for embedded systems is important whether the power is coming from a dedicated plug-in source, an isolated battery or an energy harvesting mode.
All systems benefit from low power design with reduced cost, increased reliability and compliance with energy standards.
In the case of battery powered or energy harvesting systems, the low power design enables the unit to have an extended operating life before power is gone or a battery needs replacement. Also, studies have shown that systems that were developed with low power consideration from the start of the concept tended to be smaller and use less components.
Related Article – Energy Harvesting In Wireless Sensor Networks
Low power design can be achieved in a number of ways and this article will concentrate on some methods based on systems architecture, component selection and software techniques.
At a system level, there are many trade-offs which can be made depending on the application, usage and environment where the unit operates. In general, the strategy to reduce energy consumption is to:
- minimize the run-time, or dynamic power
- maximize time spent in lowest power mode
- minimize the transition time between low power and run-time modes
- minimize voltage conversion losses
- maximize task and processing parallelism
- maximize use of autonomous peripherals
- implement interrupt driven response rather than polling
- minimize the average current draw of the system
These can be further refined based on the particular requirements of the embedded system. For example, the clocking speed of the processor may only need to be as fast as the baud rate of the communications part of the system. Some systems may be able to take advantage of scaling voltages to be proportional to the clock speed.
It’s also important to look at the entire life-cycle of the system and plan for an intelligent power strategy which can change over time. This is especially important in battery powered systems as the battery characteristics will change over time and with the number of depletion-charging cycles.
While the goal is to develop and produce a low power design that is efficient, it is also necessary to realize there is a development cost in the amount of effort it will take to produce a low power implementation. The design effort for making a system low power is typically proportional to the design target. For embedded systems, this can mean reducing overall power consumption can take 10x to 100x the amount of effort as producing a relatively inefficient, power hungry system.
To implement a low power strategy, a designer needs to consider how the system will typically operate. An application will usually have some overall usage in which it wakes up into active mode, performs a task, and transitions to sleep mode. With this in mind, a designer can create a power budget for each state.
This brings us to component selection. At the core of nearly all embedded applications is a processing unit which can be either a custom ASIC, a FPGA or a processor. This piece of silicon is usually the critical piece in developing a low power design. It’s generally good to spend the most of the component research on selecting this device.
Silicon Labs(SiLabs) is a provider of low power devices and processors, particularly their SiM3L1xx Family of low power 32-bit MCUs. Other components by SiLabs for energy efficient designs include clock / timing devices, short range sub- GHz wireless transceivers and sensors.
Related Article – SiLabs SiM3L1xx Low Power MCUs for Embedded Systems
The processor can aid in the low power design by incorporating features such as advanced power management, hardware accelerators for data encoding, security or encryption, DMA engines and fast wake / sleep transitions. Each of these features can aid in reducing the overall system power consumption while in active mode.
Depending on the application, the system may also have visual indictors (either LEDs, segment LCDs, or a display screen), communications (wireless, Ethernet, etc.), memory storage and various input sensors. Careful selection of the various peripherals will also make it easier to implement a low power design. For examples, some displays can retain their images without processor control and only need to be accessed when there is a change. This is good for many applications since the core system doesn’t need to consume power while the display is on. Also, there are ADC (analog to digital converters) which can buffer data and only wake the processor when it is full and ready to transfer a reading. This allows the processor to stay in low power mode longer and only enter active mode for the shortest time period.
Related Article – Active Display In Low Power Designs
Related Article – ADC Considerations For Low Power Designs
It’s also worth focusing on the power conversion chips or sub-systems. Most designs will have more than one voltage requirement for the various chips on the boards – some may have four, five or more. Each voltage will require a dc-to-dc convertor in a battery system, and an additional ac-to-dc convertor for a plug-in source. Inefficiencies in voltage conversion create heat, and if there is too much heat then cooling (either passive heat sink, active fans, liquids or other) has to be designed into the system adding cost, complexity and possibly more power consumption.
Some components have internal dc-dc convertors which allow them to operate off of one input voltage. Other devices require the system have a LDO (low drop out voltage regulator) or Switching Regulator or a combination Buck-Boost regulator to create the necessary voltages from the power source. Estimates are on the order of 45% for how much energy efficiency can be gained by the proper selection of a voltage regulation, and selecting components with internal regulators.
The last area for optimizing the system for low power design is with various software techniques. Many processors now come bundled with software tools to optimize the various sub functions on the devices. What is referred to as a processor, CPU, MCU, etc. is really a complete system on a chip (SOC) that has much more than just a processing unit. These also have DMA engines for data transfers, GPU for graphics processing, UART for communications, RTC for timing, ADC and DAC for sensors, FLASH for code storage and other peripherals depending on the device.
Before, a designer would need to manually configure the control registers on the device to determine when, or how, a portion of the device operates. Now a GUI (Graphical User Interface) tool greatly simplifies this process with drag-and-drop functions, check boxes or pull downs for pin assignments, and most importantly smart functions for how to enter / exit active and low power modes for each part of the device. Designers can also set clock rates for different parts of the chip, and even turn on / off (e.g., clock gating) clocks or busses as needed.
Many of the GUI will also provide power estimations using the parameters. This is an easily visible way to see how the system is estimated to work when realized. It also makes it easy to see how changing parameters can affect the power usage.
A well designed GUI from a supplier will save developers hours of time, and much frustration, compared to creating a file manually. In addition to evaluating the silicon from a manufacturer, it is worthwhile to look at the associate tools.
This short overview of low power design for embedded systems highlighted three areas to focus on – the systems architecture, component selection and software techniques. Designers can find additional information with more details on each of these topics in our related articles, as well as on chip suppliers and software vendors websites.
(Photo Credit – SiLabs )
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