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Understanding Single Event Effects For Space Applications

Radiation Effects On Space Applications
Radiation Effects On Space Applications

Radiation tolerance is often a key consideration for components and modules in space application designs. This is sometimes secondary to size, weight, power and cost parameters, especially for one-way missions which have no option for repairs or modifications.

Exposure to radiation can cause random, sporadic circuit failures in electronic components which may be temporary or permanent.

The study of radiation on electronic components was begun in the 1950s. As the technology has changed from tubes to solid state, and the transistor sizes have continued to shrink, the potential for adverse effects has increased. This is due to correlations between relative size and  charge of the ionizing radiation element to the transistor geometry and the semiconductor substrate thickness.

Ionizing radiation comes in the form of Energetic Protons, Heavy Ions, Alpha Particles, Beta Particles, Galactic Cosmic Rays and others. Neutrons are also included in this classification even though they are not ionizing particles, but their collision with nuclei creates ionizing radiation.

Non-ionizing radiation does not typically have sufficient charge to cause changes to electronic circuitry, and as such is not a concern. This classification includes light (visible and infrared), radio waves, micro-waves and thermal.

One effect of radiation on a semiconductor is that particle strikes create electron-hole pairs in the transistors oxide layer. This causes an increase in the threshold voltage – which requires a higher applied gate voltage to switch a transistor. Another result from charged particle impacts on a transistor is the potential to change the on / off state of the transistor. This can occur when the charge of the particle exceeds that of the transistor element.

Different types of radiation effects, or potential radiation sources, will require varying levels of consideration depending on whether the application is for use at sea-level, atmospheric flight, Earth orbit, extra-terrestrial landing or deep-space exploration.

In all application cases, the effects to the system can be characterized as one or more of the following:

Single Event Effects (SEE) – Soft Errors

  • Neutron Single Event Upset (NSEU)
  • Single Event Upset (SEU)
  • Single Event Transient (SET)
  • Single Event Functional Interrupt (SEFI)

Single Event Effects (SEE) – Hard Errors

  • Single Event Latchup (SEL)
  • Single Event Gate Rupture (SEGR)
  • Single Event Burnout (SEBR)

Total Ionizing Dose (TID), measured in “rads”,  is the accumulated exposure of a device to radiation over time. In general, exposure to radiation accelerates the life cycle of a semiconductor, ultimately leading to the failure of the IC .Prior to complete failure, performance parameters decline in an IC as the TID increases over time.

For packaged semiconductor integrated circuits to be certified for space grade applications, they are tested using method-1019 in MIL-STD-883. This destructive testing determines the ability of the component to withstand  Total Ionizing Dose (TID) and Enhanced Low Dose Rate Sensitivity (ELDRS). Simply described, this characterizes the components’ immunity to SEE based on its threshold to linear energy transfer (LET).

A Cobalt-60 (60Co) gamma ray source is used to generate ionizing particles which travel through the  packaged component, and the effects are measured. Standardized testing allows suppliers to create space grade products which can be specified to have a known performance in a space radiation environment.

The complete ~730 page MIL-STD-883 specification is available for download from the Defense Logistics Agency .

Radiation effects are generally categorized as either “Soft Errors” or “Hard Errors”, and identified as Single Event Effects (SEE). The general category of SEE encompasses all isolated changes to electronic circuitry resulting from interactions with high-energy particles and radiations.

A Soft Error is one which has no long term damaging effects. These can be cleared through normal operation of the device, or in extreme cases through a device reset or power cycle.

Single Event Upset (SEU) is a change in the on / off state of a transistor or a flip in value of a memory bit. Memory errors are routinely checked for, and corrected, using a variety of encoding schemes – the most basic employs one or more parity bits. Rewriting the affected memory location will restore the data to its correct state. Transistors state errors can also be identified using redundancy schemes and major-voting algorithms. The transistor will continue to operate normally and the erroneous state will be cleared the next time the transistor is toggled. However, a SEU may not be noticed until a particular memory location is read or function of the device is required.

Single Event Functional Interrupt (SEFI) is similar to a SEU in that an upset event changes the state of a transistor, however a SEFI has an immediately noticeable change in the device operation.

Single Event Transient (SET) is more severe type of SEU in which the effect to a single transistor is prorogated  to other parts of the circuitry. For example, a SEU in a clock circuit may create errors in all the transistors which are in a particular clock tree or timing domain.

Neutron Single Event Upset (NSEU) events are a subset of SEU which are caused by atmospheric neutron impacts.

Hard Errors typically cause lasting, non-recoverable damage to the circuitry. These cannot be cleared through a system reset or power cycle. Once a hard error occurs, it is permanent.

Single Event Latchup (SEL) is also referred to as “stuck bit” phenomena in which a transistor element becomes fixed in either an on or off state, or a memory bit is stuck at either a one or zero. The effected cell is now latched into a permanent state.

Single Event Gate Rupture (SEGR) is a highly destructive impact in which the gate oxide insulation of the transistor absorbs too much energy and ruptures.

Single Event Burnout (SEB) occurs when the Source of a CMOS transistor accumulates additional charge from high energy impacts. The additional charge causes a forward biasing of the transistor. This is of greater concern in power and sensing circuits, rather than logic and control circuits. In a power MOSFET, IGBT or Diode the forward bias can be great enough to cause the circuit to burnout. In extreme cases, the damaged circuit will provide too much current to other transistors and devices, causing a cascading failure.

When designing for space applications, taking into account radiation tolerance and what types of radiation exposures can be expected is critical to meeting the life cycle and performance goals. As semiconductor manufacturing improves, and new technologies such as quantum devices become available, it will become necessary to develop new testing procedures and safeguards.

In a follow-on article, we’ll discuss various circuit and system mitigation approaches to radiation effects. For a more comprehensive treatment of this topic, the leading book on the subject is:

Single Event Effects in Aerospace (Amazon – $156.00)

(Image Credit – NASA )

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